DocumentCode
3069126
Title
Design And Performance Of A VLSI 12 MB/s Trellis-coded Partial Response Channel
Author
Christiansen, G. ; Fredrickson, L. ; Karabed, R. ; Rae, J. ; Shih, Shih-Ming ; Siegel, P. ; Thapar, H.
Author_Institution
IBM Storage Systems Division, Rochester, MN
fYear
1994
fDate
14-17 Aug. 1994
Keywords
CMOS technology; Decoding; Design methodology; Detectors; Hardware; Memory management; Partial response channels; Prototypes; Very large scale integration; Viterbi algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Magnetic Recording Conference 1994. Signal Processing., Digest of the
Conference_Location
San Diego, CA, USA
Type
conf
DOI
10.1109/MRC.1994.641973
Filename
641973
Link To Document