Title :
Design And Performance Of A VLSI 12 MB/s Trellis-coded Partial Response Channel
Author :
Christiansen, G. ; Fredrickson, L. ; Karabed, R. ; Rae, J. ; Shih, Shih-Ming ; Siegel, P. ; Thapar, H.
Author_Institution :
IBM Storage Systems Division, Rochester, MN
Keywords :
CMOS technology; Decoding; Design methodology; Detectors; Hardware; Memory management; Partial response channels; Prototypes; Very large scale integration; Viterbi algorithm;
Conference_Titel :
Magnetic Recording Conference 1994. Signal Processing., Digest of the
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/MRC.1994.641973
