Title :
Low power self refresh mode DRAM with temperature detecting circuit
Author :
Kagenishi, Y. ; Hirano, H. ; Shibayama, A. ; Kotani, H. ; Moriwaki, N. ; Kojima, M. ; Sumi, T.
Author_Institution :
Memory Div., Matsushita Electron. Corp., Nagaokakyo, Japan
Abstract :
To reduce self refresh mode current, a temperature detecting circuit, back bias generator and voltage down convertor, are developed. Using these circuits in a 16M DRAM, 33 /spl mu/A consuming current in self refresh mode has been realized at Vcc=5V, Ta=25 /spl deg/C.
Keywords :
DRAM chips; convertors; temperature measurement; 16 Mbit; 25 C; 33 muA; 5 V; DRAM; back bias generator; dynamic RAM; low power self refresh mode; temperature detecting circuit; voltage down convertor; Converters; DRAM chips; Temperature measurement;
Conference_Titel :
VLSI Circuits, 1993. Digest of Technical Papers. 1993 Symposium on
Conference_Location :
Kyoto, Japan
DOI :
10.1109/VLSIC.1993.920531
