0.5 /spl mu/m CMOS circuits performing OFDM demodulation and channel estimation/correction for digital terrestrial TV applications

Author

Del Toso, C. ; Combelles, P. ; Penard, P. ; Senn, P. ; Sicre, J.-L. ; Lauer, L. ; Soyer, L. ; Galbrun, J. ; Scalise, F.

Author_Institution

France Telecom CNET, Grenoble, France

fYear

1998

fDate

5-7 Feb. 1998

Firstpage

38

Lastpage

39

Abstract

These two 0.5 /spl mu/m CMOS ICs result from DVBirds work. The first IC is dedicated to OFDM demodulation, the second, embedding 710 Kb of RAM, implements channel estimation and correction, a crucial issue in digital terrestrial TV applications. More generally, these two chips are intended for use in a global chipset receiver specified for the DVBird European project, along with a channel decoder IC and a synchronisation IC under development.

Keywords

CMOS digital integrated circuits; demodulation; digital television; frequency division multiplexing; television receivers; 0.5 micron; 710 Kbit; CMOS circuits; DVBird European project; OFDM demodulation; channel estimation/correction; digital terrestrial TV applications; global chipset receiver; Channel estimation; Circuits; Decoding; Demodulation; Digital video broadcasting; Frequency synchronization; Interpolation; Microelectronics; OFDM; TV;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International

Conference_Location

San Francisco, CA, USA

ISSN

0193-6530

Print_ISBN

0-7803-4344-1

Type

conf

DOI

10.1109/ISSCC.1998.672366

Filename

672366