DocumentCode
3070050
Title
Design strategies for low voltage and energy efficient pipelined data converters
Author
Geiger, Randy
Author_Institution
Dept. of Electr. Eng. & Comput. Eng., Iowa State Univ., Ames, IA, USA
fYear
2001
fDate
2001
Lastpage
69
Abstract
The following topics are dealt with: architecture review: design strategies; and key design issues including amplifiers, component matching, calibration and interleaving
Keywords
analogue-digital conversion; calibration; error compensation; interleaved codes; network synthesis; ADC; amplifiers; calibration; component matching; energy efficient converters; error budgets; gain boosting; interleaving; low voltage; pipelined data converters; power budget management; Calibration; Circuits and systems; Computer architecture; Conferences; Energy efficiency; Interleaved codes; Low voltage; Signal design;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power/Low Voltage Mixed-Signal Circuits and Systems, 2001. (DCAS-01). Proceedings of the IEEE 2nd Dallas CAS Workshop on
Conference_Location
Plano, TX
Print_ISBN
0-7803-6624-7
Type
conf
DOI
10.1109/DCAS.2001.920976
Filename
920976
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