DocumentCode :
3070255
Title :
A 1.2 V, 38 μW second-order ΔΣ modulator with signal adaptive control architecture
Author :
Li, Qunying ; Van der Spiegel, Jan ; Laker, Kenneth R.
Author_Institution :
Texas Instrum., Warren, NJ, USA
fYear :
2001
fDate :
2001
Abstract :
A 1.2 V, 38 μW second-order ΔΣ modulator (ΔΣM) with a signal adaptive control (SAG) architecture is fabricated in a 0.35 μm standard CMOS technology (Vt,n=0.6 V, Vt,p=-0.8 V). This modulator achieves 75 dB dynamic range and 63 dB of peak SNDR at 6.8 kHz Nyquist rate and an oversample ratio of 64. The proposed architecture effectively reduces the power dissipation while keeping the modulator performance almost unchanged
Keywords :
CMOS integrated circuits; adaptive control; operational amplifiers; sigma-delta modulation; 0.35 micron; 1.2 V; 38 muW; 6.8 kHz; CMOS technology; Nyquist rate; SNDR; dynamic range; modulator performance; oversample ratio; power dissipation; second-order sigma-delta modulator; signal adaptive control architecture; Adaptive control; CMOS technology; Capacitance; Circuits; Degradation; Delta modulation; Feedback; Sampling methods; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Low Power/Low Voltage Mixed-Signal Circuits and Systems, 2001. (DCAS-01). Proceedings of the IEEE 2nd Dallas CAS Workshop on
Conference_Location :
Plano, TX
Print_ISBN :
0-7803-6624-7
Type :
conf
DOI :
10.1109/DCAS.2001.920987
Filename :
920987
Link To Document :
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