DocumentCode :
3071110
Title :
On hardware description from block diagrams
Author :
Jagadish, H.V. ; Kailath, T. ; Newkirk, J.A. ; Mathews, R.C.
Author_Institution :
Stanford University, Stanford, CA
Volume :
9
fYear :
1984
fDate :
30742
Firstpage :
310
Lastpage :
313
Abstract :
In this paper, we present a systematic way to describe the logical architecture of the system implementing a given algorithm by means of an extended block diagram, and develop a standard notation to describe each block. We then show a technique for correctly transforming a block diagram into a physical circuit description by introducing the notion of time into the block diagram, and describe an algorithm that optimally assigns a limited number of hardware modules to all the function blocks in the diagram.
Keywords :
Algorithm design and analysis; Circuits; Clocks; Delay; Hardware; Information systems; Laboratories; Particle separators; Standards development; Steady-state;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '84.
Type :
conf
DOI :
10.1109/ICASSP.1984.1172407
Filename :
1172407
Link To Document :
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