A Unified Framework for Mapping Multidimensional Separable DSP Transforms onto parallel VLSI Structures

This paper presents a general approach for separable DSP transforms that allows the generation of higher order (longer size) multidimensional (m-d) architectures from 2^m lower order (shorter sizes) architectures. The objective of our work is to derive a unified framework and a design methodology that allows direct mapping of the proposed algorithms into modular VLSI architectures. Our methodology is based on manipulating tensor product forms so that they can be mapped directly into modular parallel architectures. The resulting circuits have very simple modular structure and regular topology.