DocumentCode
3072116
Title
A fully digital timing recovery scheme using two samples per symbol
Author
Zhu, W.P. ; Ahmad, M. Omair ; Swamy, M.N.S.
Author_Institution
Centre for Signal Process. & Commun., Concordia Univ., Montreal, Que., Canada
Volume
2
fYear
2001
fDate
6-9 May 2001
Firstpage
421
Abstract
In this paper, a new symbol timing recovery scheme is presented for digital receiver. The proposed algorithm belongs to the category of feedforward recovery and consists of two stages-phase estimation and interpolation. The phase estimation is to detect the clock phase of the sampled signal, which indicates the deviation of the reference sample from the point of maximum eye-opening. The interpolation which is implemented with an FIR filter is to reconstruct the transmitted symbols. Although many estimation algorithms have been developed in the literature, these methods usually need an input sampling rate of at least four samples per symbol. The proposed scheme requires only two samples/symbol, thus allowing the use of a very low sampling rate at the receiver. This feature is very important in the implementation of a digital receiver for high-rate transmission, since the hardware cost of the receiver depends heavily on the required processing speed
Keywords
digital communication; feedforward; interpolation; intersymbol interference; phase estimation; signal sampling; symbol manipulation; synchronisation; clock phase; digital receiver; feedforward recovery; fully digital timing recovery scheme; input sampling rate; interpolation; maximum eye-opening; phase estimation; processing speed; symbol timing recovery; Clocks; Data mining; Feedback; Frequency; Interpolation; Oscillators; Phase estimation; Sampling methods; Signal processing algorithms; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.921097
Filename
921097
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