Title :
Improved receiver architecture for digital beamforming systems
Author :
Baig, Mohammad Salman ; Karthikeyan, B. Ramaswamy ; Mazumdar, Dipayan ; Kadambi, Govind R.
Author_Institution :
M.S. Ramaiah Sch. of Adv. Studies, Bangalore, India
Abstract :
Digital beamforming (DBF) technology is progressed with the development of adaptive algorithms and architectures Modern beam forming systems have been aided by advancements in VLSI design, adaptive algorithms, RF up/down conversion systems and high sampling rate ADCs. Digital beamforming enables full utilization of the maximum number of degrees of freedom in the array. In conventional N-element array receiving system, each channel element has its own up/down conversion modules, ADC and DDC (Digital down-converter). Hence for N-element beamformer, N RF down-converters, N ADC´s and N DDC´s are required. In this paper, novel receiver architecture for digital beamforming is proposed. One central feature is the usage of ADCs with smaller range to achieve a greater dynamic range of the input signal. This proposed architecture reduces the hardware making it simple, cost effective and easy to implement. The specific ADC implemented in this system has an improved dynamic range due to analog preprocessing and digital post processing. Multiple Beamformation using the same antenna array is achieved by using the LMS algorithm. The performance criteria of a digital beamforming system are the number of antenna elements, the IF sampling rate, the RF frequency and the number of iterations required to converge. In the proposed system we attempt to improve two of these four criteria. The proposed DBF receiver system is realized using Simulink® and its simulation results are being presented. Least Mean Square (LMS) algorithm is being chosen to update complex weights to form the beam in the desired direction.
Keywords :
VLSI; analogue-digital conversion; array signal processing; least mean squares methods; radio receivers; LMS algorithm; N-element array; N-element beamformer; RF up/down conversion; VLSI design; analog preprocessing; antenna array; antenna elements; digital beamforming systems; digital down-converter; digital post processing; high sampling rate ADC; least mean square algorithm; receiver architecture; Adaptive algorithms; Antennas; Array signal processing; Arrays; Hardware; Least squares approximation; Receivers; Adaptive Digital Beamforming; Analog to Digital Converter; Beamforming Architecture; Beamforming Receiver Systems; DEMUX; Digital Down Conversion; LMS Algorithm; MUX;
Conference_Titel :
Computer, Communication and Electrical Technology (ICCCET), 2011 International Conference on
Conference_Location :
Tamilnadu
Print_ISBN :
978-1-4244-9393-7
DOI :
10.1109/ICCCET.2011.5762470