DocumentCode :
3073475
Title :
Image segmentation with improved watershed algorithm and its FPGA implementation
Author :
Kuo, Chuiig J. ; Odeh, Souheil F. ; Huang, Ming C.
Author_Institution :
Inst. of Commun. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan
Volume :
2
fYear :
2001
fDate :
6-9 May 2001
Firstpage :
753
Abstract :
This paper is concerned with image segmentation based on watershed transform techniques. It introduces a fast, improved watershed algorithm which processes 3×3 pixels in one process. Simulation results show that the improved watershed algorithm has a better throughput and yields comparable results to those of Vincent´s immersion watershed algorithm. The improved algorithm is modified and formulated such that it is amenable to computing architecture implementation. An FPGA-based architecture that is developed to implement the proposed algorithm is presented. This architecture improves the applicability of this algorithm in real time applications. A description of the improved watershed algorithm, its extension to N×N pixels, and the architecture implementation is presented
Keywords :
digital signal processing chips; field programmable gate arrays; image processing equipment; image segmentation; real-time systems; transforms; FPGA implementation; FPGA-based architecture; fast watershed algorithm; image segmentation; real time applications; watershed transform techniques; Additive noise; Computational modeling; Computer architecture; Field programmable gate arrays; Image segmentation; Pixel; Rain; Surface morphology; Surface topography; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
Type :
conf
DOI :
10.1109/ISCAS.2001.921180
Filename :
921180
Link To Document :
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