DocumentCode :
3073958
Title :
Host Intrusion Prevention System Using Signature File Method
Author :
Sree, L. Padma ; Reddy, N. Madhu Sudhan ; Rao, M. Sreenivasa
Author_Institution :
V.N.R.Vignana Jyothi Inst. of Eng. & Technol., Hyderabad
fYear :
2009
fDate :
6-7 March 2009
Firstpage :
615
Lastpage :
619
Abstract :
With networking speeds doubling every year, it is becoming increasingly difficult for software based solutions to keep up with system performance. Hardware based solutions provides high speed and better performance. Specifically we developed signature file method, which is fast and efficient method for intrusion detection systems. This paper introduces a novel and efficient VLSI architecture of signature file method based host intrusion prevention system. The VLSI architecture is implemented on the field programmable gate array (FPGA) as it provides the flexibility of reconfigurability and reprogram ability. Intrusion sequences can be detected by using a flexible pattern matching model called similarity match which enables the system to not only reduce false positive alarms, but also detect clever intruders with unexpected behavior. Hence the host based hardware detects malicious attacks, and blocks those attacks to protect it self.
Keywords :
VLSI; field programmable gate arrays; pattern matching; security of data; FPGA; VLSI architecture; false positive alarm; field programmable gate array; host intrusion prevention system; malicious attack detection; pattern matching; signature file method; Computer architecture; Field programmable gate arrays; Hardware; Hip; Intrusion detection; Monitoring; Pattern matching; Protection; System performance; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advance Computing Conference, 2009. IACC 2009. IEEE International
Conference_Location :
Patiala
Print_ISBN :
978-1-4244-2927-1
Electronic_ISBN :
978-1-4244-2928-8
Type :
conf
DOI :
10.1109/IADCC.2009.4809082
Filename :
4809082
Link To Document :
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