Title :
PRD-based global-mean-time signaling for high-speed chip-to-chip communications
Author :
Tamura, H. ; Gotoh, K. ; Araki, H. ; Wakayama, S. ; Cheung, T.S. ; Saito, M. ; Ogawa, J. ; Kato, Y. ; Nishi, T. ; Kawano, M. ; Taguchi, M. ; Imamura, Takashi
Author_Institution :
Fujitsu Labs. Ltd., Atsugi, Japan
Abstract :
A chip-to-chip signaling scheme employs partial response detection (PRD) combined with the zero-delay time delivery of a global timing reference, or global mean time (GMT). High-output-impedance drivers and higher termination resistances for signal transmission reduce driver power to the 10 mW range while maintaining a data rate of 500Mb/s. The resulting intersymbol interference (ISI) is eliminated by the PRD receivers, a type of auto-zero-comparator. Signal lines are segmented and pipelined by PRD buffers to limit the segment lengths to below Lmax=cT/2, where c is the effective velocity of signal propagation and T is the bit time. Segmentation reduces the driver power considerably.
Keywords :
partial response channels; 1 Gbit/s; 10 mW; 2 cm; 500 Mbit/s; 7.4 mW; PRD buffers; PRD-based global-mean-time signaling; auto-zero-comparator; driver power; global mean time; global timing reference; high-output-impedance drivers; high-speed chip-to-chip communications; intersymbol interference; partial response detection; segment lengths; signal propagation velocity; signal transmission; termination resistances; zero-delay time delivery; Bandwidth; Clocks; Delay lines; Intellectual property; Intersymbol interference; Resistors; Roentgenium; Signal generators; Termination of employment; Timing;
Conference_Titel :
Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-4344-1
DOI :
10.1109/ISSCC.1998.672418
