DocumentCode
3078501
Title
A scaled random walk solver for fast power grid analysis
Author
Boghrati, Baktash ; Sapatnekar, Sachin
Author_Institution
Univ. of Minnesota, Minneapolis, MN, USA
fYear
2011
fDate
14-18 March 2011
Firstpage
1
Lastpage
6
Abstract
The analysis of on-chip power grids requires the solution of large systems of linear algebraic equations with specific properties. Lately, a class of random walk based solvers have been developed that are capable of handling these systems: these are especially useful when only a small part of the original system must be solved. These methods build a probabilistic network that corresponds to the power grid. However, this construction does not fully exploit the properties of the problem and can result in large variances for the random walks, and consequently, large run times. This paper presents an efficient methodology, inspired by the idea of importance sampling, to improve the runtime of random walk based solvers. Experimental results show significant speedups, as compared to naive random walks used by the state-of-the-art random walk solvers.
Keywords
algebra; integrated circuit design; linear algebraic equations; on-chip power grids; power grid analysis; random walk solver; Approximation methods; Equations; Games; Mathematical model; Monte Carlo methods; Power grids; Roads;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011
Conference_Location
Grenoble
ISSN
1530-1591
Print_ISBN
978-1-61284-208-0
Type
conf
DOI
10.1109/DATE.2011.5763013
Filename
5763013
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