DocumentCode :
3078670
Title :
Matrix methods and redundancy in combinational circuits
Author :
Fleming, A. ; Taylor, G. ; Pugh, A.C.
Author_Institution :
University of Hull, Hull, UK
fYear :
1986
fDate :
10-12 Dec. 1986
Firstpage :
1628
Lastpage :
1629
Abstract :
A matrix model for combinational circuits is used as a framework for redundancy detection and elimination. The detection procedure ´tracks´ the logic changes encountered between fan-out nodes (the source of all redundancy) and primary outputs, and highlights those paths which indicate redundancy in other paths fanning out from the same fan-out node. The matrix model is then used to remove such redundancies, and so derive an equivalent irredundant form of the original circuit.
Keywords :
Circuit faults; Circuit testing; Combinational circuits; Electronic equipment testing; Logic circuits; Logic devices; Logic gates; Logic testing; Mathematics; Redundancy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Decision and Control, 1986 25th IEEE Conference on
Conference_Location :
Athens, Greece
Type :
conf
DOI :
10.1109/CDC.1986.267181
Filename :
4049050
Link To Document :
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