DocumentCode
3078885
Title
From NoC security analysis to design solutions
Author
Evain, Samuel ; Diguet, Jean-Philippe
Author_Institution
Rennes I Univ., France
fYear
2005
fDate
2-4 Nov. 2005
Firstpage
166
Lastpage
171
Abstract
This paper addresses a new kind of security vulnerable spots introduced by network-on-chip (NoC) use in system-on-chip (SoC) design. This study is based on the experience of a CAD framework for NoC design and proposes a classification of weaknesses with regard to usual routing and interface techniques. Finally design strategies are proposed and a new path routing technique (SCP) is introduced with the aim to enforce security.
Keywords
network interfaces; network routing; network-on-chip; security of data; CAD framework; SoC; interface techniques; network-on-chip; path routing technique; routing techniques; security analysis; system-on-chip; Application specific integrated circuits; Data security; Design automation; Field programmable gate arrays; Network-on-a-chip; Packet switching; Protection; Routing; Switches; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Systems Design and Implementation, 2005. IEEE Workshop on
ISSN
1520-6130
Print_ISBN
0-7803-9333-3
Type
conf
DOI
10.1109/SIPS.2005.1579858
Filename
1579858
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