• DocumentCode
    3080025
  • Title

    Toward sub 1 V analog integrated circuits in submicron standard CMOS technologies

  • Author

    Sansen, W. ; Steyaert, M. ; Peluso, V. ; Peeters, E.

  • Author_Institution
    Katholieke Univ., Leuven, Heverlee, Belgium
  • fYear
    1998
  • fDate
    5-7 Feb. 1998
  • Firstpage
    186
  • Lastpage
    187
  • Abstract
    Lower channel lengths lead to lower supply voltages. For 0.25 /spl mu/m MOSTs the supply voltage is 2.5 V. Even lower supply voltages will follow. This paper deals with analog integrated circuits that can handle the reduction of the supply voltage down to 1 V. Existing solutions for such low supply voltages are: 1) reduction of threshold voltages from 0.7 V to 0.3-0.4 V; 2) use of voltage multipliers. It is possible to reduce supply voltages to 1 V in standard CMOS without voltage multipliers. The advent of deep submicron CMOS dictates reduced supply voltage.
  • Keywords
    CMOS analogue integrated circuits; 0.3 to 0.4 V; MOSTs; analog integrated circuits; channel lengths; submicron standard CMOS; supply voltages; threshold voltages; voltage multipliers; Analog integrated circuits; CMOS analog integrated circuits; CMOS technology; Dynamic range; Integrated circuit technology; Low voltage; MOS devices; Rail to rail inputs; Threshold voltage; Transconductance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-4344-1
  • Type

    conf

  • DOI
    10.1109/ISSCC.1998.672428
  • Filename
    672428