DocumentCode :
3080069
Title :
Logic Circuit Design by Neural NeTwork and PSO Algorithm
Author :
Yang, Jen-Pin ; Kung, Chih-Kung ; Liu, Fang-Tsung ; Chen, Yu-Ju ; Chang, Chuo-Yean ; Hwang, Rey-Chue
Author_Institution :
Electr. Eng. Dept., I-Shou Univ., Dashu, Taiwan
fYear :
2010
fDate :
17-19 Sept. 2010
Firstpage :
456
Lastpage :
459
Abstract :
In this paper, a new logic circuit design technique by using neural network and particle swarm optimization (PSO) method is proposed. The neural network was used to substitute the logic unit and PSO algorithm was used to determine the possibility of connections among the logic units. By off-line gate-level samples, the simulation results clearly demonstrate the validity of this new technique. It could be taken as an alternative way for possible evolutionary hardware applications in the future.
Keywords :
circuit optimisation; logic circuits; logic design; neural nets; particle swarm optimisation; logic circuit design; neural network; offline gate level sample; particle swarm optimization; Artificial neural networks; Evolutionary computation; Hardware; Integrated circuit modeling; Logic circuits; Logic gates; Mathematical model; logic circuit design; neural network; particle swarm optimization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Pervasive Computing Signal Processing and Applications (PCSPA), 2010 First International Conference on
Conference_Location :
Harbin
Print_ISBN :
978-1-4244-8043-2
Electronic_ISBN :
978-0-7695-4180-8
Type :
conf
DOI :
10.1109/PCSPA.2010.116
Filename :
5635492
Link To Document :
بازگشت