Comparison of look-up table minimization methods for real-time power amplifier simulation

Look-up table (LUT) is one of the most popular methods for simulating the nonlinear characteristics of radio frequency (RF) power amplifiers. In this paper two practical methods for minimizing the LUT size are assessed for fast and flexible simulations using field programmable gate array (FPGA) circuits. They are cubic-spline interpolation and segmented nonuniform table indexing methods. The implementation architectures for these two approaches were developed and implemented. In addition, a suitable evaluation criterion for this kind of new applications is proposed in this paper. Implementation complexity and goodness of curve reconstruction were both considered so that the evaluation process could be more accurate and complete. The numerical comparisons show that the reconstruction performance of the cubic-spline interpolation method outperforms the nonuniform table indexing method dramatically by the sacrifice of a number of multipliers and double memory resources. The results also show that different segmentation schemes can considerably affect the performance of the segmented nonuniform indexing method.