An enhanced iterative scheduling algorithm for ATM input-buffered switch

This paper investigates an enhanced iterative scheduling called enhanced parallel iterative matching (EPIM) for input-buffered switches. EPIM is a modification of parallel iterative matching (PIM), and still maintains the original three-phase structure. Its capability for scheduling cell transmission is more than one time slot in each iteration which greatly increases the scheduling speed of the switch. Simulation shows that our algorithm outperforms PIM by a significant reduction in the number of iterations needed to approach the performance of the output queuing switch. Through incorporation with a static scheduling algorithm, EPIM can also operate in an environment containing a mix of cells belonging to both bandwidth-guaranteed and best-effort service categories