Title :
Diagonal low-density parity-check code for simplified routing in decoder
Author :
Kim, Euncheol ; Choi, Gwan S.
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
Abstract :
We propose a novel low-density parity-check (LDPC) decoder design methodology by introducing a special code named diagonal-LDPC (DLDPC) code. An LPDC code, defined by a parity check matrix H, can be represented by a bipartite graph. To address the complex routing problem in the LDPC decoder implementation, a partitioned bipartite-graph code is proposed and generalized to a DLDPC code having constraint of positioning 1´s near the diagonal area. This structured code simplifies the routing problem [Y. Kou et al, 2001] [R.M. Tanner et al, 2001] [H. Zhang et al, 2003] and enables cell-based highly regular fully-parallel decoder design without compromising the code performance.
Keywords :
decoding; graph theory; matrix algebra; parity check codes; LDPC decoder design; bipartite graph; code performance; complex routing problem; diagonal low-density parity-check code; parity check matrix; Bandwidth; Bipartite graph; Bit error rate; Channel coding; Decoding; Design methodology; Hardware; Parity check codes; Routing; Signal to noise ratio;
Conference_Titel :
Signal Processing Systems Design and Implementation, 2005. IEEE Workshop on
Print_ISBN :
0-7803-9333-3
DOI :
10.1109/SIPS.2005.1579966