• DocumentCode
    3080963
  • Title

    Analog soft decoding for multi-level memories

  • Author

    Winstead, Chris

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Utah State Univ., Logan, UT, USA
  • fYear
    2005
  • fDate
    19-21 May 2005
  • Firstpage
    132
  • Lastpage
    137
  • Abstract
    This paper proposes analog soft-information decoding circuits for error protection in multi-level memories, providing stronger error protection than binary error-correcting codes. The cell capacitance can then be reduced without an increase in the soft error rate. Analog decoders perform soft-information decoding with very low area requirements. We introduce a multi-level analog interface circuit for analog decoding of MLDRAM signals. We also apply basic information theory to reveal the possibilities and limitations of coding in multi-level memories.
  • Keywords
    DRAM chips; analogue integrated circuits; analogue storage; decoding; error correction codes; memory architecture; MLDRAM signal; analog soft-information decoding circuits; binary error-correcting codes; error protection; information theory; multilevel analog interface circuit; multilevel memories; CMOS technology; Capacitance; Circuits; Computer errors; Decoding; Delay; Error analysis; Error correction codes; Information theory; Protection;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic, 2005. Proceedings. 35th International Symposium on
  • ISSN
    0195-623X
  • Print_ISBN
    0-7695-2336-6
  • Type

    conf

  • DOI
    10.1109/ISMVL.2005.8
  • Filename
    1423174