Title :
Radix converters: complexity and implementation by LUT cascades
Author_Institution :
Dept. of Comput. Sci. & Electron., Kyushu Inst. of Technol., Iizuka, Japan
Abstract :
In digital signal processing, we often use higher radix system to achieve high-speed computation. In such cases, we require radix converters. This paper considers the design of LUT cascades that convert p-nary numbers to g-nary numbers. In particular, we derive several upper bounds on the column multiplicities of decomposition charts that represent radix converters. From these, we can estimate the size of LUT cascades to realize radix converters. These results are useful to design compact radix converters, since these bounds show strategies to partition the outputs into groups.
Keywords :
computational complexity; digital arithmetic; logic circuits; number theory; LUT cascades; computational complexity; decomposition charts; digital signal processing; radix converters; Character generation; Combinational circuits; Computational complexity; Computer science; Digital arithmetic; Digital signal processing; Digital systems; Instruction sets; Table lookup; Upper bound;
Conference_Titel :
Multiple-Valued Logic, 2005. Proceedings. 35th International Symposium on
Print_ISBN :
0-7695-2336-6
DOI :
10.1109/ISMVL.2005.41