Investigation of CMOS technology for 60-GHz applications

Author

Chen, Yi-Jan Emery ; Wang, Kai-Hong ; Luo, Tang-Nian ; Bai, Shuen-Yin ; Heo, Deukhyoun

Author_Institution

Graduate Inst. of Electron. Eng., Nat. Taiwan Univ., Taiwan

fYear

2005

fDate

8-10 April 2005

Firstpage

92

Lastpage

95

Abstract

This paper investigates the feasibility of the latest CMOS technology for the implementation of the emerging 60-GHz wireless applications. The double-conversion zero-IF receiver architecture is proposed for the evaluation. From the recently reported work of wireless front-end building blocks, most of the components required in the proposed 60-GHz receiver have been demonstrated in CMOS technology. It is very promising that the improved characteristics of the scaled CMOS technology, down to 0.13 μm or below, are viable for the 60-GHz wireless front-end ICs.

Keywords

CMOS integrated circuits; MMIC frequency convertors; integrated circuit design; radio receivers; 0.13 micron; 60 GHz; CMOS technology applications; double-conversion zero-IF receiver architecture; scaled CMOS; wireless applications; wireless front-end building blocks; Application software; Band pass filters; CMOS technology; Frequency; Low-noise amplifiers; Noise figure; Radiofrequency integrated circuits; Semiconductor device noise; Substrates; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

SoutheastCon, 2005. Proceedings. IEEE

Print_ISBN

0-7803-8865-8

Type

conf

DOI

10.1109/SECON.2005.1423224

Filename

1423224