DocumentCode :
3082239
Title :
Experimental analysis of spiral integrated inductors on low cost integrated circuit processes
Author :
Lee, Jongsoo ; Lee, Sunyoung ; Roblin, Patrick ; Bibyk, Steven
Author_Institution :
Dept. of Electr. & Comput. Eng., Ohio State Univ., Columbus, OH, USA
fYear :
2005
fDate :
8-10 April 2005
Firstpage :
116
Lastpage :
120
Abstract :
Integrated spiral inductors are investigated to obtain an optimal design for low cost IC processes. For this study, different inductor structures were fabricated to determine the best topology suited for optimizing the Q factor. The inductor structures studied include patterned ground shield, hollow spiral and stacked inductors. A new design for stacked inductor using two metal layers is developed to reduce the resistive loss of integrated inductors. The hollow spiral inductors and planar spiral inductors have 4.5 turns and 8 turns, respectively. A patterned ground shield is found to enhance the Q factor from 1.9 up to 3.8 in hollow spiral inductors, and from 1.6 up to 2.5 in planar inductors. The new stacked spiral inductors show slightly lower peak inductance values and resonance frequencies. Nevertheless, due to the reduction of resistive loss of inductor traces, the Q factors of the new stacked structure of inductors are improved by about 14%.
Keywords :
Q-factor; circuit optimisation; inductors; integrated circuit design; network topology; radiofrequency integrated circuits; IC processes; Q factor optimization; hollow spiral; low cost integrated circuit processes; patterned ground shield; planar inductors; resistive loss; spiral integrated inductors; stacked inductors; topology; Active inductors; Bonding; CMOS technology; Conductivity; Costs; Inductance; Q factor; Radiofrequency integrated circuits; Silicon; Spirals;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoutheastCon, 2005. Proceedings. IEEE
Print_ISBN :
0-7803-8865-8
Type :
conf
DOI :
10.1109/SECON.2005.1423229
Filename :
1423229
Link To Document :
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