• DocumentCode
    3082405
  • Title

    Frugal but flexible multicore topologies in support of resource variation-driven adaptivity

  • Author

    Yang, Chengmo ; Orailoglu, Alex

  • Author_Institution
    Electr. & Comput. Eng., Univ. of Delaware, Newark, DE, USA
  • fYear
    2011
  • fDate
    14-18 March 2011
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Given the projected higher variations in the availability of computational resources, adaptive static schedules have been developed to attain high-speed execution reconfiguration with no reliance on any runtime rescheduling decisions. These schedules are able to deliver predictable execution despite the increased levels of device unreliability in future multicore systems. Yet the associated runtime reconfiguration overhead is largely determined by the underlying system topology. Fully connected architectures, although they can effectively hide the overhead in execution migration, become infeasible as the core count grows to hundreds in the near future. We exploit in this paper the high locality associated with adaptive static schedules, and outline a scalable and locally shareable system organization for multicore platforms. With the incorporation of a limited set of neighborhood-centered communication links, threads are allowed to be directly migrated among adjacent cores without physical data movement. At the architecture level, a set of 2-dimensional physical topologies with such a local sharing property embedded is furthermore proposed. The inherent regularity allows these topologies to be adopted as a fixed-silicon multicore platform that can be flexibly redefined according to the parallelism characteristics and resilience needs of each application.
  • Keywords
    multiprocessing systems; parallel architectures; processor scheduling; system-on-chip; 2-dimensional physical topology; adaptive static schedules; adjacent cores; architecture level; associated runtime reconfiguration overhead; computational resources; device unreliability; execution migration; fixed-silicon multicore platform; flexible multicore topology; fully connected architectures; high-speed execution reconfiguration; inherent regularity; multicore platforms; multicore systems; neighborhood-centered communication links; parallelism characteristics; physical data movement; predictable execution; resilience needs; resource variation-driven adaptivity; runtime rescheduling decisions; sharing property embedded; system organization; underlying system topology; Bipartite graph; Instruction sets; Merging; Network topology; Organizations; Schedules; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011
  • Conference_Location
    Grenoble
  • ISSN
    1530-1591
  • Print_ISBN
    978-1-61284-208-0
  • Type

    conf

  • DOI
    10.1109/DATE.2011.5763201
  • Filename
    5763201