Title :
A 10 b 250 M sample/s CMOS DAC in 1 mm/sup 2/
Author :
Lin, C.-H. ; Bult, K.
Author_Institution :
Broadcom Corp., Irvine, CA, USA
Abstract :
The authors present a 10 b CMOS DAC which has optimized performance for frequency domain applications. At 250 MSample/s SFDR is 68 dB at 20 MHz output signal, and even close to Nyquist, at 120 MHz, SFDR is 57 dB. This DAC is used in embedded applications with large amounts of digital circuitry, without loss of performance. The design is realized in a 0.5 /spl mu/m single-poly triple-metal digital CMOS process.
Keywords :
CMOS integrated circuits; 0.5 micron; 10 bit; 120 MHz; CMOS DAC; embedded applications; frequency domain applications; single-poly triple-metal process; Circuits; Decoding; Distortion; Feeds; Frequency domain analysis; Latches; Linearity; Performance loss; Switches; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-4344-1
DOI :
10.1109/ISSCC.1998.672440
