DocumentCode
3082476
Title
Signal integrity evaluation of segmental transmission line under real-world application
Author
Inoue, H. ; Yasunaga, Moritoshi ; Kanazawa, Kenji ; Aibe, Noriyuki
Author_Institution
Grad. Sch. of Syst. & Inf. Eng., Univ. of Tsukuba, Tsukuba, Japan
fYear
2013
fDate
12-15 Dec. 2013
Firstpage
108
Lastpage
111
Abstract
We have proposed a novel transmission line structure called “segmental transmission line (STL)” in order to ensure high signal integrity (SI) in PCB traces already and we have also shown its high SI improvement capability in eye-diagrams. In this paper, we evaluate the STL from the real-world application view point for the first time, which is indispensable for next development step. As one of applications, we choose image-data transmission at 5 Gbps and 7.5 Gbps data-rate, and demonstrate that the STL can transmit much higher quality image-data than the conventional transmission line by not only simulations but by a 500 Mbps STL scale-up prototype. We also calculate bit error rates (BERs) and show that BERs in the conventional transmission line decrease to 1/14 and 1/25 at 5 Gbps and 7.5 Gbps, respectively in the STL.
Keywords
error statistics; printed circuit design; BER; PCB; bit error rates; bit rate 5 Gbit/s; bit rate 500 Mbit/s; bit rate 7.5 Gbit/s; eye-diagrams; image-data transmission; segmental transmission line; signal integrity evaluation; Bit error rate; Field programmable gate arrays; Image reconstruction; Image segmentation; Microstrip; Prototypes; Silicon; bit error rate; image transmission; printed circuit board; segmental transmission line; signal integrity;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2013 IEEE
Conference_Location
Nara
Print_ISBN
978-1-4799-2313-7
Type
conf
DOI
10.1109/EDAPS.2013.6724401
Filename
6724401
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