DocumentCode
3082723
Title
A low-power gigabit Ethernet analog equalizer
Author
Amini, Pezhman ; Shoaei, Omid
Author_Institution
Dept. of Electr. & Comput. Eng., Tehran Univ., Iran
Volume
1
fYear
2001
fDate
6-9 May 2001
Firstpage
176
Abstract
An analog continuous time digitally adaptive cable equalizer for gigabit Ethernet has been designed in a 0.35 μm CMOS process with a single 3 V supply. A three-stage opamp-based filter has been used while each stage has one pole and one zero consuming less than 3.8 mW. Each stage is able to amplify high frequency signals up to 11 dB
Keywords
CMOS analogue integrated circuits; adaptive equalisers; continuous time filters; local area networks; low-power electronics; 0.35 micron; 3 V; 3.8 mW; CMOS process; continuous time equalizer; digitally adaptive cable equalizer; gigabit Ethernet; low-power analog equalizer; three-stage opamp-based filter; Adaptive equalizers; Adaptive filters; Analog computers; Attenuation; Decision feedback equalizers; Ethernet networks; Filtering; Frequency; Intersymbol interference; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.921819
Filename
921819
Link To Document