DocumentCode
3082915
Title
Intermediate representations for controllers in chip generators
Author
Kelley, Kyle ; Wachs, Megan ; Danowitz, Andrew ; Stevenson, Pete ; Richardon, Stephen ; Horowitz, Mark
Author_Institution
Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA
fYear
2011
fDate
14-18 March 2011
Firstpage
1
Lastpage
6
Abstract
Creating parameterized “chip generators” has been proposed as one way to decrease chip NRE costs. While many approaches are available for creating or generating flexible data path elements, the design of flexible controllers is more problematic. The most common approach is to create a microcoded engine as the controller, which offers flexibility through programmable table-based lookup functions. This paper shows that after “programming” the hardware for the desired application, or applications, these flexible controller designs can be easily converted to efficient fixed (or less programmable) solutions using partial evaluation capabilities that are already present in most synthesis tools.
Keywords
controllers; electronic design automation; chip generators; flexible controllers; intermediate representations; microcoded engine; partial evaluation; Decoding; Generators; Hardware; Optimization; Program processors; Protocols; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011
Conference_Location
Grenoble
ISSN
1530-1591
Print_ISBN
978-1-61284-208-0
Type
conf
DOI
10.1109/DATE.2011.5763225
Filename
5763225
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