• DocumentCode
    3083098
  • Title

    A comparison of equivalent circuit models of power/ground planes based on Delaunay triangulation in transient analysis

  • Author

    Watanabe, Toshio ; Asai, Hiroki

  • Author_Institution
    Res. Center for ICT Innovation, Univ. of Shizuoka, Shizuoka, Japan
  • fYear
    2013
  • fDate
    12-15 Dec. 2013
  • Firstpage
    233
  • Lastpage
    236
  • Abstract
    In this paper, two types of equivalent circuit models, the D-model and the V-model, of power/ground planes are compared for the transient simulation. While both models are led from the Delaunay triangulation, they are different in that capacitances of the D-model and the V-model are calculated at the Delaunay triangles and the polygons of the Voronoi tessellation, respectively. The two models are compared in terms of the computation efficiency and the memory usage in the transient simulation. The advantages and disadvantages by a combination of the models and the transient simulation algorithms, including the SPICE and the latency insertion method (LIM), are discussed. Examples show that the V-model has advantages over the D-model in the SPICE simulation. On the other hand, the time-step size of the D-model tends to be very small compared with the V-model in the latency insertion method, because tiny inductances are often produced in the D-model.
  • Keywords
    SPICE; equivalent circuits; integrated circuit modelling; mesh generation; transient analysis; D-model; Delaunay triangles; Delaunay triangulation; SPICE simulation; V-model; Voronoi tessellation; equivalent circuit models; latency insertion method; memory usage; power/ground planes; time-step size; transient analysis; transient simulation; Computational modeling; Equivalent circuits; Inductors; Integrated circuit modeling; Numerical models; SPICE; Transient analysis; Delaunay Triangulation; LIM; PDN; SPICE; power integrity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2013 IEEE
  • Conference_Location
    Nara
  • Print_ISBN
    978-1-4799-2313-7
  • Type

    conf

  • DOI
    10.1109/EDAPS.2013.6724432
  • Filename
    6724432