DocumentCode :
3083172
Title :
MOSFET parasitic capacitance effects to class-DE power amplifier
Author :
Sekiya, Hiroo ; Xiuqin Wei ; Nagashima, Tomoharu
Author_Institution :
Grad. Sch. of Adv. Integration Sci., Chiba Univ., Chiba, Japan
fYear :
2013
fDate :
12-15 Dec. 2013
Firstpage :
245
Lastpage :
248
Abstract :
This paper presents analytical expressions for the class-DE amplifier with nonlinear drain-to-source and gate-to-drain capacitances. Using the analytical expressions, it is seen that drain-to-source capacitance works as linear shunt capacitance when the input signal is a square waveform. The validity of our analysis is confirmed by PSpice simulations and the circuit experiment.
Keywords :
power MOSFET; power amplifiers; MOSFET parasitic capacitance effects; PSpice simulations; analytical expressions; class-DE power amplifier; gate-to-drain capacitances; input signal square waveform; linear shunt capacitance; nonlinear drain-to-source capacitances; Capacitance; Integrated circuit modeling; Logic gates; MOSFET; SPICE; Voltage control; Zero voltage switching; Class DE power amplifier; Class E ZVS/ZDS conditions; MOSFET parasitic output capacitance; RF high-efficiency power amplifier;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2013 IEEE
Conference_Location :
Nara
Print_ISBN :
978-1-4799-2313-7
Type :
conf
DOI :
10.1109/EDAPS.2013.6724435
Filename :
6724435
Link To Document :
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