• DocumentCode
    3083368
  • Title

    Development of decoupling capacitor embedded interposers using narrow gap chip parts mounting technology with wideband ultralow PDN impedance

  • Author

    Kikuchi, Kazuro ; Aoyagi, Masahiro ; Ujiie, Masaaki ; Takayama, S.

  • Author_Institution
    Nat. Inst. of AIST, Tsukuba, Japan
  • fYear
    2013
  • fDate
    12-15 Dec. 2013
  • Firstpage
    9
  • Lastpage
    12
  • Abstract
    We have developed a new chip capacitor embedded interposer using a narrow gap chip parts mounting technology. This interposer is expected to reduce power distribution network (PDN) impedance. To investigate the efficacy of the interposer, we have fabricated other various types of capacitor embedded interposer test element group (TEG), such as a generally chip capacitor embedded organic interposer, a thin film capacitor on a silicon interposer using the same design. We evaluated PDN impedance of decoupling capacitor embedded interposers for 3-D integrated LSI system by using a developed ultralow impedance evaluation system. As a result, the chip capacitor embedded interposer using the narrow gap chip parts mounting technology shows a low PDN impedance below 0.1 Ω could be evaluated at the frequency range of up to 10 GHz. This is realized that the interposer shows the comparable level of the PDN impedance as the thin film capacitor embedded silicon interposer. It can be realized that the PDN impedance of the interposer shows below 1/100 compared with a general interposer with embedded the chip capacitor parts of 0603 types.
  • Keywords
    integrated circuit interconnections; microassembling; thin film capacitors; three-dimensional integrated circuits; 3D integrated LSI system; chip capacitor embedded interposer; chip capacitor embedded organic interposer; decoupling capacitor embedded interposers; narrow gap chip parts mounting technology; power distribution network impedance; silicon interposer; thin film capacitor; wideband ultralow PDN impedance; Capacitors; Frequency measurement; Impedance; Impedance measurement; Large scale integration; Semiconductor device measurement; Silicon; decoupling capacitor embedded interposer; narrow gap chip parts mounting technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2013 IEEE
  • Conference_Location
    Nara
  • Print_ISBN
    978-1-4799-2313-7
  • Type

    conf

  • DOI
    10.1109/EDAPS.2013.6724444
  • Filename
    6724444