A low-voltage single-Opamp 4th-order band-pass ΔΣ-modulator

A band-pass ΔΣ-modulator can be used to directly digitize the IF signal in a radio receiver. As the resolution and the channel bandwidth of a band-pass ΔΣ-modulator can easily be traded afterwards, it is the key circuit block in implementing receivers for future multi-mode mobile phones. However, the reported implementations have been based on resonator structures which are poorly suited to a low supply voltage which has led to high power consumptions. A switched-capacitor double-delay resonator structure which imposes no limitation on the Opamp output scaling is proposed. The structure allows the optimization of Opamp output swings with no power penalty and is thus ideally suited for low supply voltage. A single Opamp bandpass ΔΣ-modulator which shares the Opamp between two double-delay resonators is presented along with behavioral level simulation results. According to the simulations the presented BP ΔΣ-modulator achieves 14 b-resolution for the GSM-channel bandwidth (BW=270 kHz) and 6 b-resolution for the WCDMA-channel bandwidth (BW=3.84 MHz)