Title :
Embedding test patterns into Low-Power BIST sequences
Author :
Voyiatzis, Ioannis
Author_Institution :
Technol. Educational Inst. of Athens, Athens
Abstract :
Current trends in VLSI designs necessitate low power during both normal system operation and testing activity. Traditional built-in self test (BIST) generators rise the power and energy consumption during testing, boosting the need to add low-power solutions to the arsenal of BIST pattern generators. In this work, the utilization of gray code generators is proposed as a low-power BIST solution; more precisely, we propose an algorithm to embed a test pattern into a sequence generated by a gray code generator. Hence, test sets can be embedded into gray sequences.
Keywords :
Gray codes; VLSI; built-in self test; circuit testing; integrated circuit design; integrated circuit testing; VLSI designs; built-in self test generators; energy consumption; gray code generators; low-power BIST sequences; power consumption; test set embedding; Automatic testing; Boosting; Built-in self-test; Distributed power generation; Energy consumption; Power generation; Reflective binary codes; System testing; Test pattern generators; Very large scale integration; Built-In Self Test; Gray; Low power sequences; Test set embedding; sequences;
Conference_Titel :
On-Line Testing Symposium, 2007. IOLTS 07. 13th IEEE International
Conference_Location :
Crete
Print_ISBN :
0-7695-2918-6
DOI :
10.1109/IOLTS.2007.29
