Abstract :
An increasing demand for higher performance, lower power density, and greatly expanded functionalities will determine radical changes in the future computing architectures. These widely acknowledged emerging trends are however insufficient to address all the challenges introduced by advanced silicon nanometer technologies. It is well known that manufacturability for high yield, along with design productivity and predictability are major problems in gigascale system-on-chip (SoC) design. Moreover, as technology advances deeper into the nanometer regime, a tight control on process parameters is increasingly difficult. As a consequence, variability will be a dominant factor in the design of complex ICs that must be addressed at the technology, circuit, and architecture level. In this talk, we will discuss the impact of systematic and random variations, and we will present a new architecture-to-silicon design platform based on the concept of regularity at different levels of abstraction. Moreover, we will also introduce an innovative design methodology to synthesize clockless circuits, which can be exploited to implement logic blocks that operate under process, power supply, and temperature variations.
Keywords :
elemental semiconductors; integrated circuit design; nanoelectronics; silicon; system-on-chip; Si; architecture-to-silicon design platform; complex IC; innovative design platforms; nanometer technologies; power density; reliable SoC; system-on-chip; Circuit synthesis; Clocks; Computer architecture; Design methodology; High performance computing; Manufacturing; Process control; Productivity; Silicon; System-on-a-chip;
