Title :
Segmented sine wave digital-to-analog converters for frequency synthesizer
Author :
Jiandong Jiang ; Lee, Edward K F
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Abstract :
By using a sine wave Digital-to-Analog Converter (DAC) to perform mapping from digital phase to sine amplitude, the ROM-less Direct Digital Frequency Synthesizer (DDFS) consumes less power than the conventional ROM lookup table approach. To further reduce the power dissipation and the die area of the sine wave DAC, two segmented sine wave DAC architectures are proposed in this paper. The optimized segmentation parameters for better performance and lower power dissipation are also discussed
Keywords :
circuit optimisation; digital-analogue conversion; direct digital synthesis; interpolation; DAC architectures; ROM-less DDS; digital-to-analog converters; direct digital frequency synthesizer; frequency synthesizer; optimized segmentation parameters; power dissipation reduction; segmentation optimisation; segmented sine wave DAC; Digital-analog conversion; Digital-to-frequency converters; Frequency synthesizers; Interpolation; Laboratories; Power dissipation; Power engineering and energy; Power engineering computing; Read only memory; Table lookup;
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
DOI :
10.1109/ISCAS.2001.921907
