DocumentCode :
3084983
Title :
Technology challenges for advanced Cu CMP using a new slurry free process
Author :
Matsumoto, Muneyuki ; Suzuki, Keisuke ; Sakamoto, Tatsuya ; Kamisawa, AKira
Author_Institution :
Div. of Process Technol., ROHM Co. Ltd., Kyoto, Japan
fYear :
1999
fDate :
1999
Firstpage :
92
Lastpage :
94
Abstract :
We present an advantage, from the viewpoint of simplicity, in designing the chemical reaction mechanism during chemical-mechanical polishing (CMP) with a new slurry-free CMP process (Sethuraman, 1998; Fayolle et al., 1998). Cu-CMP has been widely reported as one of the leading techniques for Cu interconnect applications. Cu CMP, however, involves several issues such as Cu dishing, Cu recess, oxide erosion and oxide rounding (Steigerwald, 1997). We have previously reported the high performance of a new slurry free Cu-CMP (Matsumoto et al., 1998). Although a large number of studies have been made of Cu-CMP, little is known about the chemical reaction mechanism, since the conventional technique using slurry and a porous pad has a complex mechanism, i.e. the cohesion of abrasive particles and chemical reaction. Therefore, to solve these issues, this paper reports the mechanism and performance of a new slurry-free Cu-CMP technique. We conclude that dishing and erosion issues can be solved by means of the chemical approach in a new slurry free Cu-CMP technique
Keywords :
abrasion; chemical mechanical polishing; copper; integrated circuit interconnections; integrated circuit metallisation; integrated circuit yield; reaction kinetics; surface chemistry; surface topography; CMP; Cu; Cu CMP; Cu dishing; Cu interconnect applications; Cu recess; SiO2; abrasive particles; chemical reaction; chemical reaction mechanism; chemical-mechanical polishing; oxide erosion; oxide rounding; porous pad; slurry free Cu-CMP; slurry free Cu-CMP technique; slurry free process; slurry-free CMP process; slurry-free Cu-CMP technique; Abrasives; Chemical processes; Chemical technology; Current supplies; Electric resistance; Electrical resistance measurement; Research and development; Slurries; Testing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Interconnect Technology, 1999. IEEE International Conference
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-5174-6
Type :
conf
DOI :
10.1109/IITC.1999.787088
Filename :
787088
Link To Document :
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