FPGA Implementation of a Channel Equalizer Based on LMS Algorithm

Author

Bai, Yongbo ; Chen, Zili ; Hou, Ruibo ; Qi, Dongsheng

Author_Institution

Dept. of Opt. & Electrics Eng., Ordnance Eng. Coll., Shijiazhuang, China

fYear

2010

fDate

17-19 Sept. 2010

Firstpage

1149

Lastpage

1152

Abstract

In wireless communication, equalization is an effective technology to change channel characteristics and reduce the Inter-Symbol Interference (ISI). Based on analyzing the LMS algorithm, the application of this algorithm in channel equalizer is studied. A Channel Equalizer based on LMS algorithm is implemented using Xilinx System Generator for DSP develop software. This implementation method is a novel way to develop FPGA. The simulation test results show the equalizer can eliminate ISI; the performance of the implemented equalizer is dependable.

Keywords

digital signal processing chips; equalisers; field programmable gate arrays; DSP develop software; FPGA implementation; LMS algorithm; Xilinx system generator; channel equalizer; field programmable gate array; inter-symbol interference; wireless communication; Equalizers; Field programmable gate arrays; Filtering algorithms; Generators; Least squares approximation; Mathematical model; Signal processing algorithms; Channel equalizer; FPGA; LMS algorithm;

fLanguage

English

Publisher

ieee

Conference_Titel

Pervasive Computing Signal Processing and Applications (PCSPA), 2010 First International Conference on

Conference_Location

Harbin

Print_ISBN

978-1-4244-8043-2

Electronic_ISBN

978-0-7695-4180-8

Type

conf

DOI

10.1109/PCSPA.2010.283

Filename

5635737