• DocumentCode
    3086000
  • Title

    A unified charge-current compact model for ambipolar operation in quasi-ballistic graphene transistors: Experimental verification and circuit-analysis demonstration

  • Author

    Rakheja, Shaloo ; Han Wang ; Palacios, T. ; Meric, Inanc ; Shepard, Kenneth ; Antoniadis, D.

  • Author_Institution
    Microsyst. Technol. Labs., Massachusetts Inst. of Technol., Cambridge, MA, USA
  • fYear
    2013
  • fDate
    9-11 Dec. 2013
  • Abstract
    This paper presents a compact virtual source (VS) model to describe carrier transport valid in both unipolar and ambipolar transport regimes in quasi-ballistic graphene field-effect transistors (GFETs). The model formulation allows for an easy extension to bilayer graphene transistors, where a bandgap can be opened. The model also includes descriptions of intrinsic terminal charges/capacitances obtained self-consistently with the transport formulation. The charge model extends from drift-diffusive transport regime to ballistic transport regime, where gradual-channel approximation (GCA) fails. The model is calibrated exhaustively against DC and S-parameter measurements of GFETs. To demonstrate the model capability for circuit-level simulations, the Verilog-A implementation of the model is used to simulate the dynamic response of frequency doubling circuits with GFETs operating in the ambipolar regime.
  • Keywords
    S-parameters; ballistic transport; field effect transistors; frequency multipliers; graphene; hardware description languages; C; GCA; GFET; S-parameter measurements; Verilog-A implementation; ambipolar operation; ambipolar transport; ballistic transport regime; bilayer graphene transistors; carrier transport; circuit analysis; circuit-level simulations; compact virtual source model; drift-diffusive transport; frequency doubling circuits; gradual-channel approximation; intrinsic terminal charges-capacitances; quasiballistic graphene field-effect transistors; unified charge-current compact model; unipolar transport; Capacitance; Charge carrier processes; Graphene; Integrated circuit modeling; Logic gates; Mathematical model; Numerical models;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting (IEDM), 2013 IEEE International
  • Conference_Location
    Washington, DC
  • Type

    conf

  • DOI
    10.1109/IEDM.2013.6724568
  • Filename
    6724568