Title :
An integrated H.263 video CODEC with protocol processor
Author :
Jung, K.A. ; Lee, Y.S. ; Yang, H.S. ; Yang, W.S. ; Kim, Ji H. ; Lee, S.H. ; Kang, B.H.
Author_Institution :
Multimedia & Commun. Lab., C&S Technol. Inc., Seoul, South Korea
Abstract :
In this paper, we present an ASIC implementation of a programmable H.263 video CODEC processor with coprocessor based architecture for real-time encoding and decoding. This processor includes pre/post processor with various functions, and embedded H.324 protocol processor as well as video CODEC so that it provides one chip solution for H.324 videophone. With coprocessor based architecture and time multiplexed user programming capability, each CODEC function can be fully optimized for specific applications. This chip was implemented using 0.35 μm CMOS QLM technology and contains 1.2 million transistors on 40 mm2 die with 500 mW power dissipation
Keywords :
CMOS digital integrated circuits; application specific integrated circuits; coprocessors; decoding; protocols; video codecs; 0.35 micron; 500 mW; ASIC implementation; CMOS QLM technology; H.263 video CODEC; coprocessor based architecture; decoding; power dissipation; protocol processor; real-time encoding; time multiplexed user programming capability; Access protocols; Bit rate; CMOS technology; Coprocessors; Decoding; Encoding; Hardware; Multimedia communication; Reduced instruction set computing; Video codecs;
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
DOI :
10.1109/ISCAS.2001.922040
