DocumentCode :
3087025
Title :
Module placement with pre-placed modules using the B*-tree representation
Author :
Jiang, Yi-He ; Lai, Jianbang ; Wang, Ting-Chi
Author_Institution :
Dept. of Inf. & Comput. Eng., Chung Yuan Christian Univ., Chung Li, Taiwan
Volume :
5
fYear :
2001
fDate :
2001
Firstpage :
347
Abstract :
In this paper, we study the problem of module placement with pre-placed modules, and present a novel method that extends the B*-tree representation to solve the problem. The method restricts each pre-placed module to be placed at its pre-specified location all the time and uses the B*-tree representation to generate the locations for the remaining modules. Re-positioning techniques are added into the method to eliminate any overlapping between modules. The method is incorporated into a simulated annealing process and its effectiveness is demonstrated by the experimental results
Keywords :
VLSI; circuit layout CAD; integrated circuit layout; simulated annealing; trees (mathematics); B*-tree representation; module placement; pre-placed modules; re-positioning techniques; simulated annealing process; Circuit simulation; Constraint optimization; Cost function; Integrated circuit interconnections; Shape; Simulated annealing; Topology; Tree graphs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
Type :
conf
DOI :
10.1109/ISCAS.2001.922056
Filename :
922056
Link To Document :
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