An efficient balanced truncation realization algorithm for interconnect model order reduction

Author

Zhou, Dian ; Li, Wei ; Cai, Wei ; Guo, Nailong

Author_Institution

Dept. of Electr. Eng., Texas Univ., Richardson, TX, USA

Volume

5

fYear

2001

fDate

2001

Firstpage

383

Abstract

This paper presents an efficient model order reduction method for VLSI interconnect that is based on balanced truncation realization. Our scheme uses both predominant controllability and observability spaces, and shows that there is no need to solve the whole Lyapunov equation for controllability and observability grammians before obtaining approximation to their predominant spaces. The linear order reduction algorithm can be achieved by extending the O(n) Krylov Subspace Oblique Projection method

Keywords

Lyapunov methods; VLSI; integrated circuit interconnections; integrated circuit modelling; reduced order systems; Krylov subspace oblique projection method; Lyapunov equation; VLSI interconnect; balanced truncation realization algorithm; grammians; interconnect model order reduction; linear order reduction algorithm; predominant controllability space; predominant observability space; Controllability; Frequency; Integrated circuit interconnections; Linear systems; Observability; Packaging; RLC circuits; Reduced order systems; Space technology; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.922065

Filename

922065