DocumentCode
3087824
Title
Fast 2D convolution using reconfigurable computing
Author
Wong, Sebastien C. ; Jasiunas, Mark ; Kearney, David
Volume
2
fYear
2005
fDate
August 28-31, 2005
Firstpage
791
Lastpage
794
Keywords
Application specific integrated circuits; Computer architecture; Concurrent computing; Convolution; Field programmable gate arrays; Frequency domain analysis; Hardware; Image processing; Kernel; Microprocessors;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing and Its Applications, 2005. Proceedings of the Eighth International Symposium on
Print_ISBN
0-7803-9243-4
Type
conf
DOI
10.1109/ISSPA.2005.1581057
Filename
1581057
Link To Document