• DocumentCode
    3088553
  • Title

    Characterizing grain size and defect energy distribution in vertical SONOS poly-Si channels by means of a resistive network model

  • Author

    Degraeve, Robin ; Toledano-Luque, Maria ; Arreghini, A. ; Tang, Bo-Hui ; Capogreco, E. ; Lisoni, J. ; Roussel, Philippe ; Kaczer, Ben ; Van den bosch, G. ; Groeseneken, Guido ; Van Houdt, J.

  • Author_Institution
    IMEC, Leuven, Belgium
  • fYear
    2013
  • fDate
    9-11 Dec. 2013
  • Abstract
    The characterization of vertical poly-Si transistors, important for optimizing vertical SONOS memory configurations, is studied by means of a resistive network model. The statistical variation of the ISD-VG characteristics allows to extract the poly-Si grain size and from the sub-threshold regime information on the energy distribution of the poly-Si defects is extracted. This model indicates the separated impact of interface states and poly-Si states on current and Vth.
  • Keywords
    elemental semiconductors; flash memories; silicon; statistical analysis; SONOS memory configurations; Si; defect energy distribution; flash memory; grain size; interface states; resistive network model; statistical variation; subthreshold regime information; vertical poly-Si transistors; Data mining; Grain boundaries; Grain size; Logic gates; Silicon; Switches; Transconductance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting (IEDM), 2013 IEEE International
  • Conference_Location
    Washington, DC
  • Type

    conf

  • DOI
    10.1109/IEDM.2013.6724675
  • Filename
    6724675
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3088553