Title :
High performance Ge CMOS with novel InAlP-passivated channels for future sub-10 nm technology node applications
Author :
Bin Liu ; Xiao Gong ; Ran Cheng ; Pengfei Guo ; Qian Zhou ; Owen, Man Hon Samuel ; Cheng Guo ; Lanxiang Wang ; Wei Wang ; Yue Yang ; Yee-Chia Yeo ; Cheng-Tien Wan ; Shu-Han Chen ; Chao-Ching Cheng ; You-Ru Lin ; Cheng-Hsien Wu ; Chih-Hsin Ko ; Wann, Cleme
Author_Institution :
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore (NUS), Singapore, Singapore
Abstract :
We report the first realization of high performance Ge CMOS using a novel InAlP passivation scheme. The large conduction band and valence band offsets between InAlP and Ge confine electrons and holes within the Ge channel for n-FETs and p-FETs, respectively. The InAlP cap reduces scattering due to high-K/InAlP interface traps and boosts carrier mobility. As a result, a record high electron mobility μEFF of ~958 cm2/V·s at NINV of 6×1011 cm-2 was achieved for Ge(100) n-FETs, and a high peak hole mobility of ~390 cm2/V·s was obtained for Ge(100) p-FETs. High on-state currents ION of 39.5 μA/μm and 31.2 μA/μm were achieved at gate overdrive |VGS-VTH| = 1 V and |VDS| = 1 V for the n-FETs and p-FETs, respectively, with a gate length LG of ~3 μm. In addition, for the first time, this novel InAlP passivation technique was integrated into Ge n-FinFETs, and good control of short channel effects (SCEs) was achieved.
Keywords :
CMOS analogue integrated circuits; MOSFET; aluminium compounds; conduction bands; electron mobility; germanium; high-k dielectric thin films; hole mobility; indium compounds; interface states; passivation; valence bands; Ge; InAlP; SCE; carrier mobility; conduction band offset; confine electrons; electron mobility; gate length; germanium channel; germanium n-FinFET; high-K-indium aluminium phosphorus interface traps; high-performance germanium CMOS; holes; indium aluminium phosphorus-passivated channels; n-FET; on-state currents; p-FET; passivation scheme; peak hole mobility; scattering reduction; short channel effects; size 3 mum; valence band offset; voltage 1 V; Aluminum oxide; CMOS integrated circuits; Hafnium compounds; Logic gates; Passivation; Substrates;
Conference_Titel :
Electron Devices Meeting (IEDM), 2013 IEEE International
Conference_Location :
Washington, DC
DOI :
10.1109/IEDM.2013.6724700