Three-dimensional structures for high saturation signals and crosstalk suppression in 1.20 μm pixel back-illuminated CMOS image sensor

Author

Shinohara, Toshiko ; Watanabe, K. ; Arakawa, Shin´ichi ; Kawashima, Hitoshi ; Kawashima, A. ; Abe, Takashi ; Yanagita, T. ; Ohta, K. ; Inada, Yoshihisa ; Onizuka, M. ; Nakayama, Hiroki ; Tateshita, Y. ; Morikawa, T. ; Ohno, Kizuku ; Sugimoto, D. ; Kadomur

Author_Institution

IS Process Dev. Div., Sony Semicond. Corp., Kumamoto, Japan

fYear

2013

fDate

9-11 Dec. 2013

Abstract

We propose two technologies, vertical transfer gate (VTG) and buried shielding metal (BSM), that can be applied to 1.20 μm pixel back-illuminated CMOS image sensor (BI-CIS). With the VTG and BSM, the new pixel design exhibited 60% higher saturation signals and 50% lower crosstalk at wide chief ray angle (CRA). Even though both technologies have a three-dimensional structure formed on Si substrate, our process technology enabled them to be applied without increasing white blemish count or dark current degradation.

Keywords

CMOS image sensors; crosstalk; elemental semiconductors; silicon; three-dimensional integrated circuits; BI-CIS; BSM; CRA; Si; Si substrate; VTG; buried shielding metal; crosstalk suppression; dark current degradation; high saturation signals; pixel back-illuminated CMOS image sensor; size 1.20 mum; three-dimensional structure; vertical transfer gate; white blemish count; wide chief ray angle; CMOS image sensors; Crosstalk; Dark current; Electric potential; Lighting; Logic gates; Metals;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting (IEDM), 2013 IEEE International

Conference_Location

Washington, DC

Type

conf

DOI

10.1109/IEDM.2013.6724704

Filename

6724704