Title :
Reducing state loss for effective trace sampling of superscalar processors
Author :
Conte, Thomas M. ; Hirsch, Mary Ann ; Menezes, Kishore N.
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
Abstract :
There is a wealth of technological alternatives that can be incorporated into a processor design. These include reservation station designs, functional unit duplication, and processor branch handling strategies. The performance of a given design is measured through the execution of application programs and other workloads. Presently, trace driven simulation is the most popular method of processor performance analysis in the development stage of system design. Current techniques of trace driven simulation, however, are extremely slow and expensive. A fast and accurate method for statistical trace sampling of superscalar processors is proposed
Keywords :
parallel architectures; parallel machines; statistical analysis; virtual machines; application programs; functional unit duplication; processor branch handling strategies; processor performance analysis; reservation station designs; state loss reduction; statistical trace sampling; superscalar processors; system design; trace driven simulation; Analytical models; Benchmark testing; Costs; Design engineering; Instruments; Probability; Process design; Retirement; Sampling methods; System testing;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1996. ICCD '96. Proceedings., 1996 IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
0-8186-7554-3
DOI :
10.1109/ICCD.1996.563595
