• DocumentCode
    3089984
  • Title

    A low-cost 300 MHz RISC CPU with attached media processor

  • Author

    Santhanam, S. ; Baum, A. ; Bertucci, D. ; Braganza, M. ; Broch, K. ; Broch, T. ; Burnette, J. ; Chang, E. ; Chul, K. ; Dobberpuhl, D. ; Donahue, P. ; Grodstein, J. ; Kim, I. ; Murray, D. ; Pearce, M. ; Silveria, A. ; Soudalay, D. ; Spink, A. ; Stepanian,

  • Author_Institution
    Digital Equipment Corp., Palo Alto, CA, USA
  • fYear
    1998
  • fDate
    5-7 Feb. 1998
  • Firstpage
    298
  • Lastpage
    299
  • Abstract
    This custom CPU derived from the StrongARM/sup TM/ 110 is capable of more than 2 billion 16 b operations per second (2 BOPs). Starting with the original design, an attached media processor (AMP) is integrated along with a synchronous DRAM memory controller and separate I/O bus. In addition, several enhancements are made to the CPU and cache subsystem and the chip is reduced from 0.35 /spl mu/m to 0.28 /spl mu/m technology. The chip includes 3.3M transistors and measures 60 mm/sup 2/. It dissipates less than 3 W at 300 MHz at 2.0 V internal, 3.3 V I/O. The chip supports dynamic clock frequency switching for reduced operating power during low performance demands. There are 333 separately conditioned clocks on the chip. For battery powered applications, Vdd is reduced to achieve <0.5 W operation at 150 MHz. The chip is pseudo-static and supports clock stop and IDDQ testing.
  • Keywords
    CMOS digital integrated circuits; 0.28 micron; 0.5 to 3 W; 150 to 300 MHz; 2 V; 3.3 V; I/O bus; IDDQ testing; StrongARM 110; attached media processor; battery powered applications; cache subsystem; custom CPU; dynamic clock frequency switching; low-cost RISC CPU; pseudo-static chip; synchronous DRAM memory controller; Battery charge measurement; Clocks; Digital signal processing chips; Frequency; Microprocessors; Prefetching; Reduced instruction set computing; Semiconductor device measurement; Streaming media; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-4344-1
  • Type

    conf

  • DOI
    10.1109/ISSCC.1998.672474
  • Filename
    672474