Title :
High voltage GaN HEMT compact model: Experimental verification, field plate optimization and charge trapping
Author :
Radhakrishna, Ujwal ; Piedra, Daniel ; Yuhao Zhang ; Palacios, T. ; Antoniadis, D.
Author_Institution :
Microsyst. Technol. Labs., Massachusetts Inst. of Technol., Cambridge, MA, USA
Abstract :
High voltage GaN HEMTs are leading contenders for power conversion and switching applications [1]. An accurate physics-based compact device model for this emerging technology is essential for device and circuit design. Several GaN HEMT compact models have been discussed but are not physics-based [2]-[3]. Here, a new physics-based compact model for HV-GaN HEMTs, the MIT Virtual Source GaNFET-High Voltage model (MVS-G-HV) is proposed. The model is geometry scalable and captures static and dynamic device behavior through self-consistent current and charge expressions. The access regions, which are important in device linearity [4] and reverse voltage blocking, are modeled as implicit-gated transistors. The model includes the effect of field plates and can be used to maximize the BV2 Gon figure-of-merit. In addition, `knee-walkout´ in these devices is captured in the model through a simple trap-transistor model. The model requires a small number of parameters with straightforward physical meanings and is validated against DC-IV, S-parameter, breakdown and pulsed measurements of fabricated devices.
Keywords :
III-V semiconductors; gallium compounds; high electron mobility transistors; semiconductor device models; wide band gap semiconductors; DC-IV; GaN; MIT virtual source GaN FET-high voltage model; MVS-G-HV; S-parameter; charge expressions; charge trapping; circuit design; device breakdown; device linearity; dynamic device behavior; field plate effect; field plate optimization; figure-of-merit; high voltage HEMT compact model; implicit-gated transistors; knee-walkout; physics-based compact device model; power conversion; pulsed measurements; reverse voltage blocking; self-consistent current; static device behavior; trap-transistor model; Capacitance; Gallium nitride; HEMTs; Integrated circuit modeling; Logic gates; Pulse measurements;
Conference_Titel :
Electron Devices Meeting (IEDM), 2013 IEEE International
Conference_Location :
Washington, DC
DOI :
10.1109/IEDM.2013.6724740