DocumentCode
3090048
Title
On the Practicality of Atomic MWMR Register Implementations
Author
Nicolaou, Nicolas ; Georgiou, Chryssis
Author_Institution
Univ. of Cyprus, Nicosia, Cyprus
fYear
2012
fDate
10-13 July 2012
Firstpage
340
Lastpage
347
Abstract
In this work we conduct an experimental performance evaluation of four MWMR atomic register implementations: SFW from [8], APRX-SFW and CWFR from [11], and SIMPLE (the generalization of [5] in the MWMR environment). We implement the algorithms on NS2, a single processor simulator, and on PlanetLab, a planetary-scale real-time network platform. Due to its simplistic nature, SIMPLE requires two communication round-trips per read or write operation, but almost no local computation. The rest of the algorithms are (to this writing) the only to allow single round read and write operations but require non-trivial computational demands. We compare these algorithms with SIMPLE and amongst each other to study the trade-offs between communication delay and local computation. Our results shed new light on the practicality of atomic MWMR register implementations.
Keywords
delays; distributed memory systems; performance evaluation; real-time systems; APRX-SFW; CWFR; MWMR atomic register implementations; NS2 simulator; PlanetLab; SIMPLE; communication delay; communication round-trips; experimental performance evaluation; local computation; multiple-writer multiple-reader atomic registers; nontrivial computational demands; planetary-scale real-time network platform; read and write operations; single processor simulator; Algorithm design and analysis; Atomic measurements; Computer crashes; Delay; Protocols; Registers; Servers; atomic registers; computation vs communication; distributed storage; performance evaluation;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing with Applications (ISPA), 2012 IEEE 10th International Symposium on
Conference_Location
Leganes
Print_ISBN
978-1-4673-1631-6
Type
conf
DOI
10.1109/ISPA.2012.51
Filename
6280311
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